Manufacturing technology in which a stacked plurality of semiconductor chips are connected by a silicon penetrating electrode is attracting attention as a means of achieving an even higher degree of integration of a semiconductor integrated circuit. Known methods in the case of stacking a plurality of semiconductor chips include a method that first performs dicing of wafers and then stacks the chips (Chip to Chip stacking method, hereafter called “C2C method”), and a method that stacks the wafers before dicing the wafers and thereby performs dicing after stacking (Wafer to Wafer method, hereafter called “W2W method”).
The W2W method is superior to the C2C method in terms of manufacturing efficiency, but has a disadvantage that, when defect rate in each of the wafers increases, the defect rate rises cumulatively with increasing number of stacked wafers, thereby leading to a fall in product yield and rise in final product cost.